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    Ampere unveils monstrous 512-core AmpereOne Aurora processor — custom AI engine, support for HBM memory

    By Paul Alcorn,

    10 hours ago

    https://img.particlenews.com/image.php?url=2wjFCk_0uj9TETB00

    Ampere is adding the new 512-core AmpereOne Aurora processor to its roadmap, the company announced today. This new chip has custom Arm cores and a custom mesh and die-to-die interconnect. It also supports HBM memory and Ampere's next-gen AI acceleration blocks, but the company hasn't yet announced the specific launch timing.

    Ampere also unveiled pricing for its AmpereOne M processors, with the flagship 192-core model weighing in at $5,555, and outlined progress with its AmpereOne MX processors, which stretch up to 256 cores on the TSMC 3nm process node. Lastly, the company also provided deep-dive details for its AmpereOne architecture and shared more performance claims and benchmarks.

    Ampere's silicon is designed for high-density data center environments. It vies with not only AMD's core-heavy EPYC Bergamo and Intel's Sierra Forest but also a bevy of custom silicon now produced by leading hyperscalers. As such, Ampere's focus is on core-dense designs, but its particular focus on providing chips for air-cooled environments is another key value prop — Ampere says that despite 1mW racks being on the horizon amid a continued industry push for higher-performance silicon at the expense of voracious power consumption, 77% of currently-deployed racks are still under 20kW, and half fall under 10kW. Naturally, air cooling is much more forgiving on the pricing front than liquid cooling, so Ampere has focused heavily on power efficiency, naturally reducing the cooling burden.

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    The 512-core AmpereOne Aurora is currently in development and leverages the company's IP, which it developed with its AmpereOne chips. The company isn't sharing many details on this chip yet, but key highlights include Ampere's custom Arm-powered AmpereOne cores, scalable AmpereOne mesh, and a die-to-die interconnect that facilitates communication across chiplets, with the latter comprised of a custom SERDES and protocol.

    Perhaps most importantly in the AI-obsessed data center, the company also says its AmpereAI IP offers dedicated AI acceleration, and its addition of support for high bandwidth memory (HBM) will be instrumental in feeding enough memory bandwidth to the new engine. However, the chip is also geared for standard general-purpose workloads, too.

    Ampere also unveiled its pricing structure for its AmpereOne M processors. These chips are fabbed on the TSMC 5nm process node and come with support for 12 channels of DDR5 memory and 192 cores.

    These models will weigh in with impressive pricing when they ship in the fourth quarter of this year, with the lowest-end 96-core model at $4,761, while the highest-end 192-core A192-32X will go for $5,555. Ampere also has six other models that provide a range of swimlanes for the stack, which spans 96-, 128-, 144-, 160-, and 192-core models. TDPs, which Ampere specs as 'usage power' based on a SPEC integer workload, span from 185W up to 332W. The nature of Ampere's power characterization makes it hard to compare its power consumption to that of its competitors.

    The AmpereOne MX family is currently in production, but the company hasn't provided a firm launch date. These chips will increase the core count up to 256 and leverage the TSMC 3nm process paired with 12 channels of DDR5.

    The company is currently ramping AmpereOne production with a wide range of ODMs and OEMs for AmpereOne, including names like Supermicro, Gigabyte, and ASRock Rack.

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    Ampere also shared deep-dive architectural details of its AmpereOne processors ahead of next month's Hot Chips. Unfortunately, we didn't have time for deep analysis due to a slim embargo window, but the slide deck is above for your perusal. We might circle back for a deeper inspection of the architecture during Hot Chips.

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    Ampere also shared a slew of benchmarks and performance claims, but as always, take vendor-provided benchmarks with a grain of salt. We've also included the test notes at the end of the above album.

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